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application note 1 of 11 www.xicor.com june, 2000 AN82 interfacing xicor spi serial memories to hitachi h8/3000 microcontrollers by applications staff this code shows how the x25650 family of advanced spi serial eeproms can be interfaced to the hitachi h8/3000 microcontroller family when connected as shown in figure 1. the interface uses four of the port pins available on h8 family devices to implement the interface. this interface was tested with the x25650, however by using only part of the memory array, this code can be easily adapted for lower density memories. figure 1. typical hardware connection for interfacing a x25650 to the h8/3042 microcontroller
2 of 11 AN82 application note www.xicor.com june, 2000 .h8300h .file "x25650.asm" ; x25650.asm ; test code for interfacing xicor x25080/160/320/650/138 serial eeproms ; to the hitachi h8/3042 ; revision: 1.04 02/04/96 ; expects the h8/3042 hard-wired in mode 1: 8-bit bus-width, expanded address ; space (0x00000-0xfffff), internal rom disabled, internal ram enabled ; (0xff710-0xfff0f), 9.8304 mhx xtal .include "h8stddef.inc" ; h8/3042 standard register definitions ; h8/3042 specific equates .equ h8ramtop, 0xfff0f ; highest onboard ram address (2048 bytes) .equ h8rambot, 0xff710 ; lowest onboard ram address .equ rxd0, bit_2 ; receive data pin of port/sci .equ intmask, 0b11000000 ; ccr interrupt mask (i and ui bits) ; xicor eeprom device-specific equates .equ cs, bit_0 ; port bit for chip select (h8 out) .equ si, bit_1 ; port bit for serial data input (h8 out) .equ sck, bit_2 ; port bit for serial clock (h8 out) .equ so, bit_3 ; port bit for serial data output (h8 in) .equ wp, bit_4 ; port bit for write protect input (h8 out) .equ hold, bit_5 ; port bit for hold input (h8 out) .equ xicor, pbdr ; h8/3042 data port assignment (pb) .equ xicorddr, pbddr ; h8/3042 data direction port assignment .equ ddrsetup, 0b11110111 ; port data direction register setup .equ wren, 0x06 ; write enable latch instruction .equ wrdi, 0x04 ; write disable latch instruction .equ wrsr, 0x01 ; write status register instruction .equ rdsr, 0x05 ; read status register instruction .equ write, 0x02 ; write memory instruction .equ read, 0x03 ; read memory instruction .equ wipbit, bit_0 ; write in progress status bit .equ wpen, bit_7 ; write protect enable status bit .equ pagesize, 32 ; bytes per page .equ numpages, 512 ; number of pages in eeprom .equ pagemask, pagesize-1 ; mask out non-page bits .equ pagebndry, ~ pagemask ; mask out page bits (not pagemask) .equ numbytes, numpages*pagesize ; number of bytes in eeprom .equ addrmask, numbytes-1 ; mask out non-address bits .equ maxpolls, 100 ; maximum number of poll attempts for wip ; main equates
3 of 11 AN82 application note www.xicor.com june, 2000 .equ stacktop, h8ramtop-4 ; stack initializes here and builds down .equ allones, 0b11111111 ; all bits set .equ bigwrite, 170 ; test number of bytes to write (>5 pages) .equ rambfr0, h8rambot ; start of read/write buffer in on-board ram .equ rambfr1, h8rambot+pagesize ; second read/write buffer .equ rambfr2, rambfr1+bigwrite ; third read/write buffer .equ rambfr3, rambfr2+bigwrite ; fourth read/write buffer .equ databyte0, 0xf0 ; test byte 0 .equ databyte1, 0x0f ; 1 .equ databyte2, 0x55 ; 2 .equ databyte3, 0xaa ; 3 .equ xaddrb, 155 ; test byte write/read address .equ testpage, 12 ; test page number .equ xaddrp, testpage*pagesize ; test page write/read address .equ xaddrbp, numbytes-10 ; test block protect read/write address .equ xaddrbw, 14*pagesize ; eeprom bigwrite destination ; start of code ; .org 0x00000 ; h8/3042 interrupt vector jump table ; must reside at address 0x00000 .long 0x00000100 ; 0 reset .long _bogus_int ; 1 reserved .long _bogus_int ; 2 reserved .long _bogus_int ; 3 reserved .long _bogus_int ; 4 reserved .long _bogus_int ; 5 reserved .long _bogus_int ; 6 reserved .long _bogus_int ; 7 external interrupt (nmi) .long _bogus_int ; 8 trap instruction (4 sources) .long _bogus_int ; 9 trap instruction (4 sources) .long _bogus_int ; 10 trap instruction (4 sources) .long _bogus_int ; 11 trap instruction (4 sources) .long _bogus_int ; 12 external interrupt irq0 .long _bogus_int ; 13 external interrupt irq1 .long _bogus_int ; 14 external interrupt irq2 .long _bogus_int ; 15 external interrupt irq3 .long _bogus_int ; 16 external interrupt irq4 .long _bogus_int ; 17 external interrupt irq5 .long _bogus_int ; 18 reserved .long _bogus_int ; 19 reserved .long _bogus_int ; 20 wovi watchdog timer .long _bogus_int ; 21 cmi refresh controller .long _bogus_int ; 22 reserved .long _bogus_int ; 23 reserved .long _bogus_int ; 24 imia0 gra0 compare match/input capture .long _bogus_int ; 25 imib0 grb0 compare match/input capture .long _bogus_int ; 26 ovi0 overflow 0 .long _bogus_int ; 27 reserved .long _bogus_int ; 28 imia1 gra1 compare match/input capture .long _bogus_int ; 29 imib1 grb1 compare match/input capture .long _bogus_int ; 30 ovi1 overflow 1 .long _bogus_int ; 31 reserved .long _bogus_int ; 32 imia2 gra2 compare match/input capture
4 of 11 AN82 application note www.xicor.com june, 2000 .long _bogus_int ; 33 imib2 grb2 compare match/input capture .long _bogus_int ; 34 ovi2 overflow 2 .long _bogus_int ; 35 reserved .long _bogus_int ; 36 imia3 gra3 compare match/input capture .long _bogus_int ; 37 imib3 grb3 compare match/input capture .long _bogus_int ; 38 ovi3 overflow 3 .long _bogus_int ; 39 reserved .long _bogus_int ; 40 imia4 gra4 compare match/input capture .long _bogus_int ; 41 imib4 grb4 compare match/input capture .long _bogus_int ; 42 ovi4 overflow 4 .long _bogus_int ; 43 reserved .long _bogus_int ; 44 dend0a dmac group 0 .long _bogus_int ; 45 dend0b dmac group 0 .long _bogus_int ; 46 dend1a dmac group 0 .long _bogus_int ; 47 dend1b dmac group 0 .long _bogus_int ; 48 reserved .long _bogus_int ; 49 reserved .long _bogus_int ; 50 reserved .long _bogus_int ; 51 reserved .long _bogus_int ; 52 eri0 receive error sci chan 0 .long _bogus_int ; 53 rxi0 receive data full sci chan 0 .long _bogus_int ; 54 txi0 transmit data empty sci chan 0 .long _bogus_int ; 55 tei0 transmit end sci chan 0 .long _bogus_int ; 56 eri1 receive error sci chan 1 .long _bogus_int ; 57 rxi1 receive data full sci chan 1 .long _bogus_int ; 58 txi1 transmit data empty sci chan 1 .long _bogus_int ; 59 tei1 transmit end sci chan 1 .long _bogus_int ; 60 adi a/d end _bogus_int: orc #0b11000000,ccr ; disable interrupts (i and ui) rte ; .org 0x000100 _powerup: ; initialization orc #intmask,ccr ; disable interrupts (i and ui) mov.l #stacktop,er7 ; initialize the stack pointer bsr _init_xiport:16 ; initialize the eeprom i/o port bset #wp,@xicor ; write protect line high to enable eeprom _test_start: bsr _wrdi_cmnd:16 ; disable writing to the eeprom bsr _rdsr_cmnd:16 ; read status register bsr _wren_cmnd:16 ; enable writing to the eeprom bsr _rdsr_cmnd:16 ; read status register ; write a single byte to the eeprom, then read it back bsr _wren_cmnd:16 ; enable writing to the eeprom mov.b #databyte3,r0l mov.w #xaddrb,r1 ; setup target test address bsr _byte_write:16 ; write byte mov.w #xaddrb,r1 ; setup the same address just written
5 of 11 AN82 application note www.xicor.com june, 2000 bsr _byte_read:16 ; read byte ; write a single page to the eeprom, then read it back bsr _wren_cmnd:16 ; enable writing to the eeprom mov.w #xaddrp,r1 ; setup eeprom target page address mov.l #-datase0,er2 ; point to source data bsr _page_write:16 ; ... and write the page mov.w #xaddrp,r1 ; again, setup eeprom source page address mov.l #rambfr1,er2 ; point to destination buffer in onboard ram mov.w #pagesize,e1 ; setup byte read count bsr _read_seq:16 ; ... and read the page ; write a sequence of bytes to the eeprom (multiple pages), then read them back ; first, setup a byte sequence in ram xor.w r1,r1 ; initialize byte sequence/count mov.l #rambfr1,er2 ; ... and point to the destination _bigwr_setup: mov.b r1l,r0l ; fetch byte to store xor.b r6h,r0l ; complement if required mov.b r0l,@er2 ; store a byte in the ram buffer inc.l #1,er2 ; bump pointer to next ram location inc.w #1,r1 ; count bytes stored/generate next byte cmp.w #bigwrite,r1 ; have we done 'em all? blt _bigwr_setup ; no, continue ; write the byte sequence mov.w #bigwrite,e1 ; setup byte count mov.w #xaddrbw,r1 ; setup eeprom starting address mov.l #rambfr1,er2 ; setup eeprom 'big write' (count is in e1) bsr _wren_cmnd:16 ; enable writing to the eeprom bsr _write_seq:16 ; ... and write 'em ; read the byte sequence mov.w #bigwrite,e1 ; setup to read 'em back! mov.w #xaddrbw,r1 mov.l #rambfr2,er2 bsr _read_seq:16 ; spin a tight loop ... wait for a reset to do it over _endloop: bra _endloop ; eeprom interface subroutines ; name: _init_xiport ; function: initializes the h8 i/o port bit directions ; calls: none ; expects: nothing
6 of 11 AN82 application note www.xicor.com june, 2000 ; returns: nothing ; registers: r0l ; remarks must be called once initially to setup the i/o port _init_xiport: mov.b #ddrsetup,r0l ; setup port data directions mov.b r0l,@xicorddr ; ... and load 'em bset #cs,@xicor ; chip select high (disable eeprom) bclr #si,@xicor ; drop serial input to eeprom bclr #sck,@xicor ; drop the clock sck bclr #wp,@xicor ; write protect line low, disable writes bset #hold,@xicor ; hold line high, enable writes rts name: _wren_cmnd ; function: sends the command to enable writing to the xicor eeprom ; calls: _send_byte ; expects: nothing ; returns: nothing ; registers: r0l ; remarks: note that this command must preceed each write sequence _wren_cmnd: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #wren,r0l ; setup write enable instruction bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _wrdi_cmnd ; function: sends the command to disable writing to the xicor eeprom ; calls: _send_byte ; expects: nothing ; returns: nothing ; registers: r0l ; remarks: _wrdi_cmnd: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #wrdi,r0l ; setup write disable instruction bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _wrsr_cmnd ; function: sends the command which enables writing to the bp0 and ; bp1 bits of the xicor eeprom status register ; calls: _send_byte, _poll_write ; expects: block protect bits in r0l ; returns: nothing ; registers: r0l, e0
7 of 11 AN82 application note www.xicor.com june, 2000 ; remarks: _wrsr_cmnd: mov.w r0,e0 ; temporarily preserve block protect bits bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #wrsr,r0l ; setup write status register instruction bsr _send_byte:16 mov.w e0,r0 ; recover block protect bits bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 rts ; name: _rdsr_cmnd ; function: sends the command which reads the contents of the xicor eeprom ; eeprom status register ; calls: _send _byte, _recv_byte ; expects: nothing ; returns: status in r0l ; registers: r0l ; remarks: _rdsr_cmnd: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #rdsr,r0l ; setup read status register instruction bsr _send_byte:16 bsr _recv_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _byte_write ; function: writes a single byte to the xicor eeprom memory array ; calls: _send_byte, _poll_write, _send_word ; expects: byte to be sent in r0l, address in r1 ; returns: nothing ; registers: r0l, r1, e0 ; remarks: _byte_write: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.w r0,e0 ; temporarily preserve the byte mov.b #write,r0l ; setup write instruction bsr _send_byte:16 ; send it bsr _send_word:16 ; send address mov.w e0,r0 ; recover the byte bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16
8 of 11 AN82 application note www.xicor.com june, 2000 rts ; name: _byte_read ; function: reads a single byte from the xicor eeprom memory array ; calls: _send_byte, _recv_byte _send_word ; expects: serial eeprom byte address in r1 (0x0000-0x01ff) ; returns: byte read in r0l ; registers: r0l, r1, e0 ; remarks: _byte_read: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #read,r0l ; setup read instruction bsr _send_byte:16 ; send it bsr _send_word:16 ; send address bsr _recv_byte:16 ; receive byte from eeprom bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _page_write ; function: sends a full page (32 bytes) to the xicor eeprom ; calls: _send_byte, _poll_write _send_word ; expects: serial eeprom destination starting address in r1, pointer to ; source bytes (32) in er2 ; returns: nothing ; registers: r0l, r0h, r1, er2, r3l ; remarks: _page_write: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #write,r0l ; setup write instruction bsr _send_byte:16 ; send it bsr _send_word:16 ; send address mov.b #pagesize,r3l _page_wrloop: mov.b @er2+,r0l ; fetch byte to send, point to next one bsr _send_byte:16 dec.b r3l ; click off another sent byte bne _page_wrloop bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 rts ; name: _read_seq ; function: reads a sequence of bytes from the xicor eeprom serial eeprom ; calls: _send_byte, _recv_byte _send_word ; expects: eeprom source starting address in r1, count of ; bytes to read in e1, pointer to start of destination storage in er2 ; returns: byte array read in memory ; registers: r0l, r0h, r1, e1, er2 ; remarks:
9 of 11 AN82 application note www.xicor.com june, 2000 _read_seq: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #read,r0l ; setup read instruction bsr _send_byte:16 ; ... and send it bsr _send_word:16 ; send address _read_seqloop: bsr _recv_byte:16 ; fetch byte from eeprom mov.b r0l,@er2 ; store eeprom byte into memory inc.l #1,er2 ; point to next storage location dec.w #1,e1 ; click off another byte read bne _read_seqloop ; continue if not zero ... bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts name: _write_seq ; function: writes a sequence of bytes to the xicor eeprom serial eeprom ; calls: _send_byte, _send_word, _poll_write ; expects: eeprom destination starting address in r1, count of bytes to write ; in e1, pointer to start of source storage in er2 ; returns: nothing ; registers: r0l, r0h, r1, e1, er2, r3 ; remarks: takes advantage of page write mode to minimize write times _write_seq: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #write,r0l ; setup write instruction bsr _send_byte:16 ; send it mov.w r1,e3 ; preserve eeprom destination address bsr _send_word:16 ; send address _write_seqloop: mov.b @er2+,r0l ; fetch byte to write & point to next one bsr _send_byte:16 dec.w #1,e1 ; click off another byte written inc.w #1,e3 ; point to next destination address mov.w e3,r3 ; ... and scratchpad it and.b #pagemask,r3l ; keep destination address page bits beq _wrseq_pagend ; zero means prior address was page end or.w e1,e1 ; is the byte count zero? bne _write_seqloop ; no, continue with this page bclr #sck,@xicor ; yes, set sck low bset #cs,@xicor ; cs high bsr _poll_write:16 ; is the write still in progress in eeprom? rts _wrseq_pagend: bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 ; is the write still in progress in eeprom? or.w e1,e1 ; is the byte count zero? beq _wrseq_done ; yes, we're done bsr _wren_cmnd:16 ; no, more to do so re-enable writing mov.w e3,r1 ; recover next eeprom address as expected bra _write_seq ; back to the eeprom _wrseq_done:
10 of 11 AN82 application note www.xicor.com june, 2000 rts ; name: _send_byte ; function: sends a byte to the xicor eeprom, serially shifting msb first ; calls: none ; expects: byte to be sent in r0l ; returns: nothing ; registers: r0l, r0h ; remarks: _send_byte: mov.b #8,r0h ; setup bit count _send_loop: bclr #sck,@xicor ; sck low rotxl.b r0l ; slip next msb into carry bst #si,@xicor ; copy carry to i/o port bit bset #sck,@xicor ; sck high dec.b r0h ; click off a bit bne _send_loop ; continue if not done bclr #si,@xicor ; si low rts ; name: _send_word ; function: sends a word to the xicor eeprom, serially shifting msb first ; calls: none ; expects: word to be sent in r1 ; returns: nothing ; registers: r0h, r1 ; remarks: _send_word: mov.b #16,r0h ; setup bit count _word_loop: bclr #sck,@xicor ; sck low rotxl.w r1 ; slip next msb into carry bst #si,@xicor ; copy carry to i/o port bit bset #sck,@xicor ; sck high dec.b r0h ; click off a bit bne _word_loop ; continue if not done bclr #si,@xicor ; si low rts ; name: _recv_byte ; function: receives a byte from the xicor eeprom, serially shifting msb first ; calls: none ; expects: nothing ; returns: received byte in r0l ; registers: r0l, r0h ; remarks: clock rate limited for h8/3042 16mhz xtal _recv_byte: mov.b #8,r0h ; setup bit count _recv_loop: bset #sck,@xicor ; sck high nop
11 of 11 AN82 application note www.xicor.com june, 2000 nop nop ; guarantee limited clock rate bclr #sck,@xicor ; sck low bld #so,@xicor ; copy input port bit to carry rotxl.b r0l ; slip carry into lsb dec.b r0h ; click off a bit bne _recv_loop ; continue if not done rts ; name: _poll_write ; function: polls for the completion of the non-volatile write cycle by ; examining the write-in-progress bit of the status register ; calls: _rdsr_cmnd ; expects: nothing ; returns: nothing ; registers: r1l ; remarks: polling delay count setup for h8/3042 16mhx xtal _poll_write: mov.b #maxpolls,r1l ; setup maximum number of poll attempts _poll_loop: bsr _rdsr_cmnd:16 ; fetch the eeprom status register content btst #wipbit,r0l ; is the write-in-progress bit zero? beq _poll_loop1 ; yes, write is complete dec.b r1l ; no, click off another poll attempt bne _poll_loop ; if we haven't exceeded maximum polls ... _poll_loop1: rts ; data tables .align 0 _dataset0: .byte 0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55 .byte 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80 .byte 0xaa,0x55,0xaa,0x55,0xaa,0x55,0xaa,0x55 .byte 0xfe,0xfd,0xfb,0xf7,0xef,0xdf,0xbf,0x7f

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